A. Technical Field
The present invention relates to linear regulators and, more particularly, to systems, devices, and methods of improving operating efficiency of linear regulators through adaptive headroom control.
B. Background of the Invention
In order to maximize efficiency of linear regulators, it is desirable to operate at the lowest possible input voltage since, for a given linear regulator output current, the efficiency of a linear regulator is a function of its output voltage divided by the input voltage. However, reducing the input voltage of a linear regulator below its drop-out voltage results in poor output regulation and/or noise performance.
Some existing designs utilize a pre-regulator that is coupled between a relatively high voltage power source and a relatively low linear regulator output voltage in order to reduce the input voltage of the low voltage regulator relative to its output voltage in order to avoid the degradation of efficiency associated with high regulator input voltages.
In particular, PMIC in architectures with multiple low-dropout linear regulators (LDO) that operate loads requiring differing power levels LDOs are oftentimes grouped together and coupled to the common output of a single pre-regulator. For example, a number of regulators that are designed to provide an output voltage of around 1.5 V are grouped together and driven from the same voltage rail and by the same output voltage of a pre-regulator. The pre-regulator output voltage is typically preset to a fixed, maximum value required by any linear regulator within the group in order to avoid drop-out conditions.
In addition, the minimum required headroom for each LDO regulator is taken into account to formulate a worst-case system voltage requirement, which is typically equal to the sum of the programmed pre-regulator output voltage and the highest headroom voltage requirement within the group of LDO regulators. The headroom serves as a safety margin that accounts for expected variations encountered during regular operation.
However, even when PMICs drive each group of LDO regulators with a dedicated pre-regulator, such open-loop topologies use static headroom settings that are characterized by larger than necessary headroom margins and input voltages for the majority of the LDO regulators within the group and, therefore, negatively impacts system efficiency. What is needed are tools for system designers to overcome the above-mentioned limitations.